DocumentCode :
3769367
Title :
Implementation of memory architecture for real-time spaceborne SAR imaging system
Author :
Zhiliu Yang;Zhu Yang;Shan Dong;Liang Chen
Author_Institution :
Beijing Key Laboratory of Embedded Real-time Information Processing Technology, Beijing, Institute of Technology, Beijing 100081, China
fYear :
2015
Firstpage :
1
Lastpage :
5
Abstract :
Due to the existence of the large scale matrix transposition, the memory bandwidth becomes the bottleneck of the real-time processing in spaceborne SAR imaging. The paper reports a preliminary study result of the memory architecture in the spaceborne SAR imaging system. It consists of algorithm summarizations, implementation difficulty discussions and processing requirement analysis. Then, a new memory architecture is being proposed to improve memory access efficiency and its implementation is specified. Finally, results of different methods are compared and imaging results validates the presented memory architecture.
Publisher :
iet
Conference_Titel :
Radar Conference 2015, IET International
Print_ISBN :
978-1-78561-038-7
Type :
conf
DOI :
10.1049/cp.2015.1298
Filename :
7455520
Link To Document :
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