• DocumentCode
    3769897
  • Title

    Design and implementation of MAC unit based on Vedic Square, and its application

  • Author

    Gitika Bhatia;Karanbir Singh Bhatia;Shashank Srivastava;Pradeep Kumar

  • Author_Institution
    Amity School of Engineering and Technology, Amity University Uttar Pradesh
  • fYear
    2015
  • Firstpage
    1
  • Lastpage
    5
  • Abstract
    The paper presents the design of a MAC unit that is based on the Vedic Square and its application, for the processing of equations that solely contain square terms. The use of Vedic Square as a replacement of the multiplier helps in reduction of area. In this paper, the Vedic Square is compared to the Vedic multiplier; both are based on the UrdhvaTiryagbhya sutra of Vedic mathematics. Duplex property of this sutra forms the basis of the Vedic Square. Using this, 50% of logic gates are eliminated from the initial level of 2*2 bit and 12.64% for 16*16 bit Vedic Square architecture. This leads to an increase in speed by means of reduced toggling of gates. Moreover, it reduces total area of the MAC unit (with Vedic Square and Kogge Stone Adder) by 11.23% relative to the MAC with Vedic Multiplier and Kogge Stone Adder. MAC unit based on Vedic Square is used to run the equations of Pythagoras theorem, Equation of Ellipse, Equation of Circle and Equation of Sphere, and in the future can process other equations of this type with addition of selective hardware. Mentor Graphics-Modelsim 6.5a PE and Precision synthesis by Mentor Graphics are used for implementation.
  • Keywords
    "Mathematical model","Computer architecture","Adders","Logic gates","Simulation","Hardware"
  • Publisher
    ieee
  • Conference_Titel
    Electrical Computer and Electronics (UPCON), 2015 IEEE UP Section Conference on
  • Type

    conf

  • DOI
    10.1109/UPCON.2015.7456676
  • Filename
    7456676