Title :
Simulation of trench-based InGaAs LDMOSFET with improved performance
Author :
Manoj Singh Adhikari;Yashvir Singh
Author_Institution :
Department of Electronics and Communication Engineering, G B Pant Engineering College, Pauri, UK-246 194, India
Abstract :
The structure of a conventional laterally diffused MOSFET (LDMOSFET) build on InGaAs is modified by placing trenches in the epitaxial layer. The gate of the proposed device (LDMOSFET) is placed in a oxide (Al2O3) trench between the source of the structure for creating twice channels in the p-base. Parallel conduction of twice channels leads to increase in drain current, higher transconductance, lower threshold-voltage, and decrease in on-resistance. The proposed device also has twice trenches of oxide which are placed in the drift region on both sides of gate electrode to enhance the reduced-surface-field (RESURF) effect for the improvements in breakdown voltage (BV). Using two-dimensional (2-D) numerical simulations, it is explained that the proposed device LDMOSFET gives 1.55 times increase in drain current, 14% reduction in threshold-voltage, 90% increase in transconductance, 33% lower on-resistance, and 2.2 times enhancement in breakdown voltage (BV) in comparison to the planar LDMOSFET for identical device length.
Keywords :
"Logic gates","Indium gallium arsenide","Transconductance","Performance evaluation","MOSFET","Threshold voltage","Silicon"
Conference_Titel :
Electrical Computer and Electronics (UPCON), 2015 IEEE UP Section Conference on
DOI :
10.1109/UPCON.2015.7456711