Optimized cryptographic algorithm for embedded systems

Cryptographic hash algorithms have gained widespread popularity over its algorithmic complexity and the impossibility of recreation of the original input from the message digest. Embedded systems employ such algorithms for its security after substantial modifications in order to meet the hardware specifications due to the parsimonious capacity of such systems. Efficacious hashing algorithms lucidly adhere to all performance constraints and therein lies its popularity. We propose an optimization of the Secure Hashing Algorithm 1 (SHA-1) in memory requirements to suit the environment of an embedded system. We explore the idea of simplifying SHA-1´s complicated set of steps to quicken its execution through loop reduction and lookup buffers stored in the main memory.