The effect of variation on neuromorphic network based on 1T1R memristor array

Memristor is a promising device in neuromorphic computing application by working as the basic element in the synapses array. To overcome the disadvantage (e.g. sneak path) and inconvenience (e.g. programming operation) of the 2-terminal 1R or 1S1R based RRAM cross-bar, we propose a new hardware structure and appropriate operation to implement a one transistor one resistor (1T1R) array. By MATLAB and HSPICE joint simulation, the proposed neuromorphic network is constructed and the pattern classification function is presented. The total 30 patterns are classified rapidly and precisely. Meanwhile the effect of the inherent defects in memristor i.e. cycle-to-cycle and device-to-device variance are also discussed in this paper.