True Random Number Generator based on compact chaotic oscillator

True Random Number Generator (TRNG) based on CMOS designed compact discrete-time chaotic oscillator is presented. The chaotic oscillator was designed using 3 transistors map circuit in order to construct an approximate V-shape characteristic (inverse tent map). Simulation of the chaotic oscillator was described and examined in terms of bifurcation diagram and transient waveform to show that it has a desirable output and suitability for TRNG. The TRNG has been used chaotic oscillator to generate a random signal and increase the randomness of output signal through a dual oscillator sampling method and XOR. The circuit was designed and simulated in 0.18μm CMOS technology with 1.8 voltage supply. Furthermore, it was tested to be functional for output bit rate 23 Mbps and passed all test methods in NIST suit standard. The proposed TRNG exposes a potential alternative in both compact and robust random bit sequence that suitable to various other applications in security.