• DocumentCode
    3770922
  • Title

    Junctionless transistors for dynamic memory and sensing applications

  • Author

    Mukta Singh Parihar;Abhinav Kranti

  • Author_Institution
    Low Power Nanoelectronics Research Group, Electrical Engineering Discipline, Indian Institute of Technology Indore, M-Block IET-DAVV Campus, Khandwa Road, Madhya Pradesh, India
  • fYear
    2014
  • fDate
    7/1/2014 12:00:00 AM
  • Firstpage
    1
  • Lastpage
    3
  • Abstract
    In this work, we report on the feasibility and design optimization of impact ionization junctionless transistors for dynamic memory and bio-sensing applications. Optimization of snapback and the hysteresis effects in the output characteristics to achieve high current margin between the two reading states of a dynamic memory are presented. The optimized cell offers nearly 4 orders of difference in the reading current of the two logic states. A possible application of these JL transistors for designing an ultra-sensitive bio-sensor is also outlined and compared with the conventional inversion mode transistor design.
  • Keywords
    "Transistors","Logic gates","Silicon","Electronic mail","Optimization","Dielectrics","CMOS integrated circuits"
  • Publisher
    ieee
  • Conference_Titel
    Nanoelectronics Conference (INEC), 2014 IEEE International
  • Electronic_ISBN
    2159-3531
  • Type

    conf

  • DOI
    10.1109/INEC.2014.7460448
  • Filename
    7460448