A novel digital controlled technique for operational amplifier compensation

Author

Kim, Woo Jin ; Sompur, Shivakumar ; Kim, Yong-Bin

Author_Institution

Dept. of Electr. & Comput. Eng., Northeastern Univ., Boston, MA, USA

Volume

1

fYear

2001

fDate

2001

Firstpage

211

Abstract

In this paper, a method for operational amplifier compensation is described. An operational amplifier having an offset as high as ±20 mV can be compensated to have a residual offset of as low as ±1 mV. The offset is achieved by trimming the currents in the active loads of the differential pair stage of the op-amp. The trimming currents are obtained by means of a series of binary weighted current sinks. The result of compensation can be observed digitally. and the trim data that is needed to switch on or off the current sinks can also be sent serially in digital format. In this paper, a chip has been designed which incorporates the afore-mentioned compensation technique, and the initial version of the chip without the digital interface logic has been fabricated using AMI 0.5 μm CMOS technology

Keywords

CMOS analogue integrated circuits; compensation; differential amplifiers; operational amplifiers; 0.5 micron; CMOS; active loads; amplifier compensation; binary weighted current sinks; differential pair stage; digital controlled technique; operational amplifier; residual offset; trimming currents; Ambient intelligence; CMOS logic circuits; CMOS technology; Digital control; Logic design; Operational amplifiers; Protocols; Sun; Switches; Voltage;

fLanguage

English

Publisher

ieee

Conference_Titel

Circuits and Systems, 2001. MWSCAS 2001. Proceedings of the 44th IEEE 2001 Midwest Symposium on

Conference_Location

Dayton, OH

Print_ISBN

0-7803-7150-X

Type

conf

DOI

10.1109/MWSCAS.2001.986151

Filename

986151