Title :
Logic BIST architecture for FPGAs
Author :
Niamat, Mohammed Y. ; Mohan, Prabhu
Author_Institution :
Dept.of Comput. Sci. & Eng. Technol., Toledo Univ., OH, USA
Abstract :
In this paper, we propose a built-in-self-test (BIST) based approach for testing the configurable logic blocks of FPGAs. BIST technique, when applied to a FPGA, does not need any additional testing circuitry. BIST logic is programmed into the FPGA in test mode and the FPGA is reprogrammed to perform its normal function once testing is completed. This effectively eliminates the need for any additional design-for-test circuitry
Keywords :
built-in self test; field programmable gate arrays; integrated circuit testing; logic testing; BIST based approach; BIST logic; CLB testing; FPGA; built-in-self-test; configurable logic blocks; logic BIST architecture; testing circuitry; Built-in self-test; Circuit faults; Circuit testing; Design for testability; Field programmable gate arrays; Logic arrays; Logic devices; Logic testing; Programmable logic arrays; Routing;
Conference_Titel :
Circuits and Systems, 2001. MWSCAS 2001. Proceedings of the 44th IEEE 2001 Midwest Symposium on
Conference_Location :
Dayton, OH
Print_ISBN :
0-7803-7150-X
DOI :
10.1109/MWSCAS.2001.986207
