Recent progress of junction technology for germanium CMOS

To realize scaled Ge CMOS device, there are several challenges of junction formation in nMOSFET. (Fermi level pinning, activation and diffusion of n-type impurities and junction leakage, etc.) In this paper, we report recent progresses of controllability of band alignment at metal/Ge interface, understanding of n-type impurity activation in Ge, and impact of oxygen in Ge on n+/p junction leakage.