DocumentCode
3773033
Title
Recent progress of junction technology for germanium CMOS
Author
Tomonori Nishimura;Choong Hyun Lee;Toshimitsu Nakamura;Takeaki Yajima;Kosuke Nagashio;Koji Kita;Akira Toriumi
Author_Institution
The University of Tokyo, 7-3-1 Hongo, Bunkyo-ku, 113-8656, Japan
fYear
2015
fDate
6/1/2015 12:00:00 AM
Firstpage
65
Lastpage
68
Abstract
To realize scaled Ge CMOS device, there are several challenges of junction formation in nMOSFET. (Fermi level pinning, activation and diffusion of n-type impurities and junction leakage, etc.) In this paper, we report recent progresses of controllability of band alignment at metal/Ge interface, understanding of n-type impurity activation in Ge, and impact of oxygen in Ge on n+/p junction leakage.
Keywords
"Junctions","Annealing","Impurities","Metals","Substrates","Conductivity","MOSFET circuits"
Publisher
ieee
Conference_Titel
Junction Technology (IWJT), 2015 15th International Workshop on
Type
conf
DOI
10.1109/IWJT.2015.7467098
Filename
7467098
Link To Document