DocumentCode :
3774622
Title :
High-bandwidth memory technology and systems implications
Author :
Chuck Moore
Author_Institution :
AMD, USA
fYear :
2008
Firstpage :
1
Lastpage :
3
Abstract :
As Moore´s Law enables us to pack more CPUs and other computing devices onto future chips, addressing the "Memory Wall" takes on a whole new level of importance. The combination of larger working sets, multiple working sets, and bandwidth hungry offload computing devices take a difficult situation and make it worse. This tutorial will introduce these challenges, and present several potential technology solutions, as well as the associated system-level implications.
Keywords :
"Bandwidth","Tutorials","Random access memory","Next generation networking","Central Processing Unit","Stacking","Systems architecture"
Publisher :
ieee
Conference_Titel :
Hot Chips 20 Symposium (HCS), 2008 IEEE
Type :
conf
DOI :
10.1109/HOTCHIPS.2008.7476512
Filename :
7476512
Link To Document :
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