DocumentCode
3774644
Title
SpursEngine™ a high-performance stream processor derived from cell/B.E.™ for media processing acceleration
Author
Hiroo Hayashi
Author_Institution
Toshiba Corporation Semiconductor Company, Advanced SoC Development Center, Japan
fYear
2008
Firstpage
1
Lastpage
38
Abstract
Presents a collection of slides covering the following: SpursEngine architecture overview; video indexing and searching; video data characteristics; synergistic processor element; SpursEngine software programming environment; SPU runtime; flexible transcoding; super-real-time transcoding; face navigation; face detection; gesture interface remote control; and one-frame super-resolution.
Keywords
"High definition video","Broadcasting","Transcoding","Bandwidth","Program processors","Application programming interfaces"
Publisher
ieee
Conference_Titel
Hot Chips 20 Symposium (HCS), 2008 IEEE
Type
conf
DOI
10.1109/HOTCHIPS.2008.7476534
Filename
7476534
Link To Document