• DocumentCode
    3774645
  • Title

    A 167-processor computational array for highly-efficient DSP and embedded application processing

  • Author

    Dean Truong;Wayne Cheng;Tinoosh Mohsenin; Zhiyi Yu;Toney Jacobson;Gouri Landge;Michael Meeuwsen;Christine Watnik;Paul Mejia; Anh Tran;Jeremy Webb;Eric Work; Zhibin Xiao;Bevan Baas

  • Author_Institution
    VLSI Computation Lab, University of California, Davis, USA
  • fYear
    2008
  • Firstpage
    1
  • Lastpage
    27
  • Abstract
    This article consists of a collection of slides from the authors´ conference presentation. Some of the topics discussed included processors and shared memories; on-chip communication; dynamic voltage & clock frequency; and an analysis and summary.
  • Keywords
    "Program processors","Digital signal processing","Reconfigurable architectures","Parallel processing","Dynamic voltage scaling","System-on-chip","Fast Fourier transforms"
  • Publisher
    ieee
  • Conference_Titel
    Hot Chips 20 Symposium (HCS), 2008 IEEE
  • Type

    conf

  • DOI
    10.1109/HOTCHIPS.2008.7476535
  • Filename
    7476535
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=3774645