• DocumentCode
    3774921
  • Title

    PULP: A parallel ultra low power platform for next generation IoT applications

  • Author

    Davide Rossi;Francesco Conti;Andrea Marongiu;Antonio Pullini;Igor Loi;Michael Gautschi;Giuseppe Tagliavini;Alessandro Capotondi;Philippe Flatresse;Luca Benini

  • Author_Institution
    DEI-UNIBO
  • fYear
    2015
  • Firstpage
    1
  • Lastpage
    39
  • Abstract
    Presents a collection of slides covering the following: PULP platform; Internet of Things; IoT applications; near-sensor processing; near-threshold multiprocessing; minimum energy operation; extended OpenRISC core; body biasing; ULP memory implementation; power management; heterogeneous memory architecture; fractal heterogeneity; and convolutional neural networks.
  • Keywords
    "Memory architecture","Reduced instruction set computing","Low-power electronics","Parallel processing","Internet of things","Microcontrollers"
  • Publisher
    ieee
  • Conference_Titel
    Hot Chips 27 Symposium (HCS), 2015 IEEE
  • Type

    conf

  • DOI
    10.1109/HOTCHIPS.2015.7477325
  • Filename
    7477325
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=3774921