• DocumentCode
    3774928
  • Title

    Kalray MPPA®: Massively parallel processor array: Revisiting DSP acceleration with the Kalray MPPA Manycore processor

  • Author

    Benoit Dupont de Dinechin

  • Author_Institution
    HotChips 2015
  • fYear
    2015
  • Firstpage
    1
  • Lastpage
    27
  • Abstract
    Presents a collection of slides covering the following topics: manycore processor roadmap; field-programmable gate arrays (FPGA); digital signal processors (DSP); graphics processing units (GPU); Intel many integrated core (MIC); Bostan processor architecture; and supecomputing on a chip.
  • Keywords
    "Time factors","Scalability","Digital signal processing","Graphics processing units","Parallel processing","Field programmable gate arrays","Network-on-chip"
  • Publisher
    ieee
  • Conference_Titel
    Hot Chips 27 Symposium (HCS), 2015 IEEE
  • Type

    conf

  • DOI
    10.1109/HOTCHIPS.2015.7477332
  • Filename
    7477332
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=3774928