DocumentCode :
3774945
Title :
Raven: A 28nm RISC-V vector processor with integrated switched-capacitor DC-DC converters and adaptive clocking
Author :
Yunsup Lee;Brian Zimmer;Andrew Waterman;Alberto Puggelli;Jaehwa Kwak;Ruzica Jevtic;Ben Keller;Stevo Bailey;Milovan Blagojevic;Pi-Feng Chiu;Henry Cook;Rimas Avizienis;Brian Richards;Elad Alon;Borivoje Nikolic;Krste Asanovic
Author_Institution :
University of California, Berkeley
fYear :
2015
Firstpage :
1
Lastpage :
45
Abstract :
This article consists of a collection of slides from the authors´ conference presentation. The topics discussed included: Motivation/Raven Project Goals; On-Chip Switched Capacitor DC-DC Converters; Raven3 Chip Architecture; Raven3 Implementation; Raven3 Evaluation; and RISC-V Chip Building at UC Berkeley.
Keywords :
"Switched capacitor circuits","DC-DC power converters","System-on-chip","Vector processors","Reduced instruction set computing","Functional programming"
Publisher :
ieee
Conference_Titel :
Hot Chips 27 Symposium (HCS), 2015 IEEE
Type :
conf
DOI :
10.1109/HOTCHIPS.2015.7477469
Filename :
7477469
Link To Document :
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