Title :
The Blue Gene/Q Compute chip
Author_Institution :
IBM BlueGene Team
Abstract :
This article consists of a collection of slides from the author´s conference presentation covering the following topics: IBM Blue Gene/Q development; massively parallel supercomputing systems; BlueGene/Q compute chip; system-on-a-chip design; BG/Q processor unit; crossbar switch; L2 cache; DDR3 memory interface; networking logic; physical-to-logical PUnit mapping; and Blue Gene/Q packaging hierarchy.
Keywords :
"Program processors","Design methodology","Parallel processing","System-on-chip","Supercomputers"
Conference_Titel :
Hot Chips 23 Symposium (HCS), 2011 IEEE
DOI :
10.1109/HOTCHIPS.2011.7477488
