Title :
Bandwidth engine® serial memory chip breaks 2 billion accesses/sec
Author :
Michael J. Miller
Author_Institution :
VP Technology Innovation & Systems Applications, MoSys
Abstract :
Presents a collection of slides covering the following topics: network memory access; bandwidth engine design; memory interface; and multicore process.
Keywords :
"Memory management","Bandwidth","Engines","Channel capacity","Program processors"
Conference_Titel :
Hot Chips 23 Symposium (HCS), 2011 IEEE
DOI :
10.1109/HOTCHIPS.2011.7477493
