DocumentCode
3774985
Title
Power management architecture of the 2nd generation Intel® Core microarchitecture, formerly codenamed Sandy Bridge
Author
Efi Rotem;Alon Naveh;Doron Rajwan;Avinash Ananthakrishnan;Eli Weissmann
Author_Institution
Sandy Bridge power architect
fYear
2011
Firstpage
1
Lastpage
33
Abstract
This article consists of a collection of slides from the author´s conference presentation on the special features, system design and architectures, processing capabilities, and targeted markets for Intel´s Sandy Bridge, a power management architecture for the second generation of Intel´s core microarchitecture.
Keywords
"Bridge circuits","Logic gates","Energy efficiency","Power demand","Microarchitecture","Thermal management"
Publisher
ieee
Conference_Titel
Hot Chips 23 Symposium (HCS), 2011 IEEE
Type
conf
DOI
10.1109/HOTCHIPS.2011.7477510
Filename
7477510
Link To Document