DocumentCode
3774986
Title
AMD´S "LLANO" Fusion APU
Author
Denis Foley;Maurice Steinman;Alex Branover;Greg Smaus;Antonio Asaro;Swamy Punyamurtula;Ljubisa Bajic
fYear
2011
Firstpage
1
Lastpage
38
Abstract
Presents a collection of slides covering the following topics: APU architecture and floorplan; CPU core feature; graphics feature; unified video decoder feature; power gating; and turbo core.
Keywords
"Computer architecture","Graphics processing units","Decoding","Video decoders","Ports (Computers)"
Publisher
ieee
Conference_Titel
Hot Chips 23 Symposium (HCS), 2011 IEEE
Type
conf
DOI
10.1109/HOTCHIPS.2011.7477511
Filename
7477511
Link To Document