• DocumentCode
    3775143
  • Title

    IBM zEC12 processor subsystem

  • Author

    Robert Sonnelitter

  • Author_Institution
    System z Processor Development, Systems & Technology Group, IBM Corp., United States
  • fYear
    2013
  • Firstpage
    1
  • Lastpage
    25
  • Abstract
    The IBM zEC12 has a robust, multi-level shared cache hierarchy that is designed to meet the needs of the enterprise class computing environment and represents a significant growth in system capacity and performance from its predecessor.
  • Keywords
    "Topology","Cache storage","Benchmark testing","Program processors","Time factors","Operating systems"
  • Publisher
    ieee
  • Conference_Titel
    Hot Chips 25 Symposium (HCS), 2013 IEEE
  • Type

    conf

  • DOI
    10.1109/HOTCHIPS.2013.7478304
  • Filename
    7478304
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=3775143