Integrating rack level connectivity into a PCIe switch

Presents a collection of slides covering the following topics: PCIe switch system block diagram; ID routing; congestion avoidance via pull protocol; QoS; integrated messaging engine; short packet push; DMA pull; fabric topologies; 3D fat tree; μserver aggregation fabric; host SW layer diagram; ExpressIOV; SR-IOV VF; performance benchmark; system HW latency estimation; simulated throughput; and payload size.