Exploring manycore multinode systems for irregular applications with FPGA prototyping

New knowledge discovery applications, such as social network analysis, employ big pointer-based data structures, including graphs or trees. They have large amounts of latent parallelism, but the memory patterns are highly irregular. Current High Performance Computing (HPC) systems employ processors with advanced cache hierarchies. They are optimized for regular computations and scientific applications with high temporal and spatial locality. Conversely, irregular applications have poor or no locality. In addition, their datasets are very difficult to partition in a balanced way. Speed up the execution and development of irregular applications on commodity multi-core architectures with limited additional custom hardware. The target is designing more cost-effective HPC clusters capable of efficiently supporting both regular and irregular applications.