DocumentCode :
3775721
Title :
Stateful OpenFlow: Hardware proof of concept
Author :
Salvatore Pontarelli;Marco Bonola;Giuseppe Bianchi;Antonio Capone;Carmelo Cascone
Author_Institution :
CNIT/Universit? di Roma Tor Vergata
fYear :
2015
fDate :
7/1/2015 12:00:00 AM
Firstpage :
1
Lastpage :
8
Abstract :
This paper presents a hardware implementation of Openstate, an extension of OpenFlow that allows performing stateful control functionalities directly inside the switch, without requiring the intervention of an external controller. The paper shows how, with a minimal reworking of the OpenFlow´s basic architecture, and reusing the same building blocks, it is possible to greatly extend the intelligence of an OpenFlow switch allowing the offload of many control task directly in the switch. An FPGA based implementation of an Openstate prototype is here presented, the different architectural design choices are discussed, and the performance and limitations of the developed prototype are examinated. Finally, the paper proposes a discussion on the performance achievable by using an ASIC implementation of the OpenState switch1.
Keywords :
"Switches","Hardware","Prototypes","Ports (Computers)","Field programmable gate arrays","Random access memory"
Publisher :
ieee
Conference_Titel :
High Performance Switching and Routing (HPSR), 2015 IEEE 16th International Conference on
Electronic_ISBN :
2325-5609
Type :
conf
DOI :
10.1109/HPSR.2015.7483105
Filename :
7483105
Link To Document :
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