An automated fault injection for evaluation of LUTs robustness in SRAM-based FPGAs

A new fault injection approach targeting the LUTs configuration bits of the Xilinx SRAM-based FPGAs is presented. It allows identifying all the configuration bits used by the LUTs of a specific design to inject Single Event Upsets (SEUs) and Multiple Bit Upsets (MBUs). The identification of the LUTs configuration bits is done by comparing the EBC files of a specific design before and after modifying its XDL file by inverting the LUTs logic functions. The fault injection is ensured by a fault injection macro provided by Xilinx. A Python script is deployed to automate the fault injection procedure. The proposed approach does not require extra tools to identify LUTs configuration bits and offers a 100% of fault coverage and is applicable to new Xilinx FPGA generations.