Research on prediction model for NAND flash bit errors

NAND flash memory has become more and more widespread storage medium due to its outstanding read/write performance. With the aggressive scaling of NAND flash memory, the storage reliability continued decreasing. While there are lacks of effective evaluation methods for modeling the NAND flash bit errors, most current studies only focus on the single program disturb error or the data retention error. If conducting a method to completely evaluate NAND flash error distribution, it will provide significative guidance for Flash Translation Layer (FTL) algorithms and Error Correction Codes (ECC) to improve the performance of NAND flash. To solve these problems, we have obtained a large amount of data about bit errors from our experimental platform for NAND flash. According to the measured data, we first proposed a polynomial evaluation model for NAND flash bit errors. To achieve the effective prediction, we compared the effectiveness of different evaluation models. The detailed test results show that our polynomial prediction model for NAND flash bit errors has good approximation ability and strong error tolerance, and the model will have comprehensive applications prospect.