Hardware for coherent and non-coherent fast acquisition for GPS/GLONASS signals

In this paper, the design and implementation of an architecture implemented in a FPGA for coherent and non-coherent fast acquisition of GPS and GLONASS signals is presented. The acquisition stage has to determine the frequency deviation of the signal carrier and the delay or phase of the expansion code, due to the use of Direct Sequence Spread Spectrum as the modulation system. The hardware includes, also, an interface compatible with the AMBA bus. This allows the architecture to be controlled with any microprocessor compatible with that bus. For reducing the processing time, the Fast Fourier Transform (FFT) is used, so a FFT core is implemented and included in the design. To validate the design, this paper shows the measurements done using real signal and the used resources for the synthesis.