A comparative analysis of hardware techniques for implementation of IIR digital filter on FPGA

FPGAs allow implementation of systems in digital signal processing with similar features than those using other hardware implementation. However, parallelization and pipelining capability with FPGA are better than DSP, and low cost and reconfigurability are advantages comparing with ASICs. This paper presents a IIR digital filter implementation on FPGA using two different techniques: writing the code in VHDL and designing the filter using a high level description tools like Xilinx System Generator. Advantages and drawbacks of these techniques are analyzed, and the required hardware resources are shown.