Design of low power logic gates by using 32nm and 16nm FinFET technology

In today´s world different technologies are present in case of electronics market. The electronics market grown very rapidly because of most of the devices are compact, innovative, giving more efficiency and consumes less power with very small supply voltage. Because of the advancement in the semiconductor technology, integration of whole electronics system on a single chip is practicable. We have seen the change in the semiconductor technology from personal computer to the laptops and then to the cell phones and thus the mobile and computing markets are continue to innovate at dramatic rate. For all this, the most viable successor is a CMOS technology. But the 22nm node of CMOS fails to perform these operations because the shrinking of this CMOS leads to the short channel effect. Multigate FET technology is the most feasible successor to planar CMOS technology at the 22-nm node and beyond. These multi-gate transistors are called fin field-effect transistors (FinFET). Design of NOR and NAND circuits is present in this paper, to improve the speed and power of these gates. Also in this paper, the comparative study of different performance parameters for CMOS and FinFET technology for basic logic gates is present. Dynamic power, current, static power are some parameters which are evaluated with the help of tanner EDA tool.