FPGA implementation of space vector pulse width modulated Neutral Point Clamped three-level Inverter fed Induction motor drive

This paper is proposed on generating efficient PWM pulses using space vector modulation technique for a three phase three level NPC voltage source inverter fed Induction motor drive using a low cost and an efficient field programmable gate array (FPGA) controller for Industrial application. The space vector modulation technique for three-level NPC inverters using the nearest three Triangle Vectors (NTV) is discussed in detail. The proposed scheme is able to easily determines the location of reference vector and calculation of on times. It uses a simple mapping to generate gating signals for the inverter using Space vector modulation strategy to reduce the THD. The performance of three level inverter is analyzed in terms of line voltages, currents and total harmonic distortion (THD) using both simulation and Hardware implementation for detailed analysis. In the proposed work, SVM algorithm is described in high-speed integrated circuit hardware description language coding and implemented using XILINX SPARTAN 3A DSP FPGA processor. The simulation and Hardware results have been good agreement with the proposed work.