DC level stabilization in Neutral Point Clamped multilevel inverters

The multilevel inverters are in favor of academia as well as industry in the recent decay for high power and low voltage applications, due to their ability to synthesize waveforms with better THD and attain higher voltages. An important issue of the multilevel inverters is the capacitor voltage balancing problem. In this paper balancing of dc link capacitor voltage of three level diode clamped inverter and five level diode clamed inverter using sine PWM associated with phase shift is considered. The proposed control strategy balances the capacitor voltages, and decreases the harmonic content of voltage and current. The simulation results will verify the effectiveness of the proposed control strategy, and the variation of Total Harmonic Distortion (THD) is observed with the variation in load.