• DocumentCode
    3779732
  • Title

    Sub micron P-MOSFETs under static and swap stress

  • Author

    H.-M. M?hlhoff;P. Murkin;M. Orlowski;W. Weber;K.H. Kusters;W. M?ller;C. M. Rogers;H. Wendt

  • Author_Institution
    Corporate Research and Technology, Techn. Center for Microelectronics Siemens AG Otto-Hahn-Ring 6, 8000 Munich 83, West Germany
  • fYear
    1987
  • fDate
    5/1/1987 12:00:00 AM
  • Firstpage
    57
  • Lastpage
    58
  • Abstract
    It has been shown that current degradation of p-channel transistors is dependent on drain structure and it is lowest for maximum gate drain overlap. P-channel transistors show severe degradation when source and drain are reversed during stress (Swap stress). This poses an increased reliability risk for p-channel pass transistors and transfer gates in P-MOS DRAMS.
  • Keywords
    "Stress","Logic gates","Degradation","Transistors","MOSFET circuits","Electric fields","Substrates"
  • Publisher
    ieee
  • Conference_Titel
    VLSI Technology, 1987. SymVLSITech 1987. Symposium on
  • Print_ISBN
    978-1-5090-3151-1
  • Type

    conf

  • Filename
    7508758
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=3779732