Title :
Shallow trench isolated buried N+ FAMOS transistors for VLSI EPROMs
Author :
A. L. Esquivel;A. T. Mitchell;J. L. Paterson;H. L. Tigelaar;B. R. Riemenschneider;T. M. Coffman;M. Gill;R. Lahiry;D. McElroy;P. Shah
Author_Institution :
Semiconductor Process and Design Center-Dallas
fDate :
5/1/1987 12:00:00 AM
Abstract :
This paper presents a novel application of shallow trench isolation (less than one micron deep) to buried N+ FAMOS (Floating gate Avalanche Injection MOS) transistors with applications to VLSI EPROMs, The trench isolation has improved not only bitline isolation but also the programming efficiency of an equally novel cross-point Advanced Contactless EPROM (ACE) cell.
Keywords :
"Transistors","Programming","Electric breakdown","Substrates","EPROM","Leakage currents","Nonvolatile memory"
Conference_Titel :
VLSI Technology, 1987. SymVLSITech 1987. Symposium on
Print_ISBN :
978-1-5090-3151-1