DocumentCode :
3779893
Title :
A die-on-board PCB for testing high-speed integrated circuits
Author :
Mukul Ratwani;Nandakumar Nambath;Rakesh Ashok;Shalabh Gupta
Author_Institution :
Department of Electrical Engineering, IIT Bombay, Mumbai - 400076, India
fYear :
2015
Firstpage :
1
Lastpage :
2
Abstract :
Chip-on-board (COB) printed circuit boards (PCB) appear to be a very attractive solution for testing high-speed integrated circuits (IC). Attaching the bare die directly on a PCB takes away the packaging cost, which is as high as the chip fabrication cost or more when it comes to the high-speed ICs. Wafer probing is a good alternative, but may not come in handy if there are too many high-speed signals to be probed. We have developed a cost-effective method to test high-speed ICs by flip-chip bonding them directly onto the PCB. The designed PCB will be used to test an IC which has 50 pins, and has eight sets of differential signals with speeds up to 25-GBd. Grounded differential co-planar wave-guides were designed to take out the high-speed signals to the GPPO connectors arranged in the periphery of the PCB. The differential transmission lines have a pitch of 100 μm near to the IC and are widened and bifurcated such that they match with the dimensions of the single ended connectors in the periphery of the PCB. S-parameter simulations done on the transmission lines show promising results.
Keywords :
"Integrated circuits","Testing","Connectors","Scattering parameters","Packaging","Layout","Simulation"
Publisher :
ieee
Conference_Titel :
Applied Electromagnetics Conference (AEMC), 2015 IEEE
Type :
conf
DOI :
10.1109/AEMC.2015.7509150
Filename :
7509150
Link To Document :
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