DocumentCode
3780360
Title
Design of DRAM having dummy cell sensing structure
Author
Sunil kumar Ojha;O.P. Singh;G.R. Mishra;P.R. Vaya
Author_Institution
Department of ECE, Amity University Lucknow Campus, India
fYear
2015
Firstpage
234
Lastpage
236
Abstract
A novel DRAM with dummy cell structure is designed using reference voltage for the fast sensing operation. The voltage level for sensing the data bit is also reduced. This design is analyzed using 90nm process technology and HSPICE simulator.
Keywords
"Random access memory","Substrates","Sensors"
Publisher
ieee
Conference_Titel
Recent Advances in Electronics & Computer Engineering (RAECE), 2015 National Conference on
Type
conf
DOI
10.1109/RAECE.2015.7510196
Filename
7510196
Link To Document