DocumentCode
3781167
Title
Transaction level model of HDMI transmitter based on System Verilog
Author
Xiang Liang;Ligang Hou;Jinhui Wang;Chunhui Yang;Deyang Gao;Lin Zhu
Author_Institution
VLSI and System Lab, Beijing University of Technology, Beijing 100124, China
fYear
2015
Firstpage
1
Lastpage
4
Abstract
As the era of high-definition multimedia coming, driven by consumer needs, HDMI (High Definition Multimedia Interface)has been popularized day after day and its application field gets enlarged. This paper forwards a transaction level model of HDMI transmitter which is designed by the language of System Verilog, and verifies it using a HDMI receiver IP (Intellectual Property). The model can separately reuse and be reference model of the hardware design according to the division of each module.
Keywords
"Object oriented modeling","Encoding","Clocks","Hardware design languages","Image color analysis","Data models","Receivers"
Publisher
ieee
Conference_Titel
ASIC (ASICON), 2015 IEEE 11th International Conference on
Print_ISBN
978-1-4799-8483-1
Electronic_ISBN
2162-755X
Type
conf
DOI
10.1109/ASICON.2015.7516906
Filename
7516906
Link To Document