Title :
Exploring stacked main memory architecture for 3D GPGPUs
Author :
Yuang Zhang;Li Li;Axel Jantsch;Zhonghai Lu;Minglun Gao;Yuxiang Fu;Hongbing Pan
Author_Institution :
Institute of VLSI Design, LAPEM, Nanjing University, 210046, Nanjing, China
Abstract :
The tremendous number of threads on general purpose graphic processing units (GPGPUs) poses significant challenges on memory architecture design. 3D stacked main memory architecture atop GPGPU is a potential approach to provide high data communication bandwidth and low access latency to meet the requirement of GPGPUs. In this paper, we explore the performance of 3D GPGPUs with stacked main memory. The experimental results show that the 3D stacked GPGPU can provide up to 124.1% and on average 55.8% performance improvement compared to a 2D GPGPU scheme.
Keywords :
"Three-dimensional displays","Graphics processing units","Random access memory","Memory management","Memory architecture","Instruction sets","Bandwidth"
Conference_Titel :
ASIC (ASICON), 2015 IEEE 11th International Conference on
Print_ISBN :
978-1-4799-8483-1
Electronic_ISBN :
2162-755X
DOI :
10.1109/ASICON.2015.7516950
