A low-leakage power clamp ESD protection circuit with prolonged ESD discharge time and compact detection network

A novel power-rail ESD clamp circuit with a small time constant to achieve a longer turn-on time is proposed. During an ESD event, the turn-on time of discharge transistor Mbig in the proposed circuit is 5.87 times of that of the traditional one; under the normal power supply condition, the total leakage current has reduced to 4.635% compared with the leakage current of traditional circuit; under fast power supply condition, the proposed power-rail ESD clamp circuit can work efficiently with a turned off discharge transistor, thus avoiding the loss of power consumption due to the false triggering in traditional power-rail ESD clamp circuit.