DocumentCode :
3781282
Title :
A GHz-level ring-counter-based multi-modulus fractional LO divider with on-the-fly tunability
Author :
Bukun Pan;Jing Jin;Jianjun Zhou
Author_Institution :
Center for Analog/RF Integrated Circuits (CARFIC), School of Microelectronics, Shanghai Jiao Tong University, Shanghai 200240, China
fYear :
2015
Firstpage :
1
Lastpage :
4
Abstract :
A novel architecture of multi-modulus fractional LO divider is presented in this paper. The ring-counter-based sub-N downsamplers are used to generate fractional division ratios. A LO divider with division ratios of /2.5, /3.5 and /6.5 utilizing the proposed method is designed in 40-nm CMOS process to cover the 2/3/4G cellular band. Components are reused to reduce the chip area. The division ratios can be changed on-the-fly. The divider consumes 9.61 mA from 1.1 V supply. Other division ratios can be achieved by changing the downsample factor N of the sub-N downsamplers.
Keywords :
"Synchronization","Calibration","Delays","Frequency conversion","Voltage-controlled oscillators","Radiation detectors"
Publisher :
ieee
Conference_Titel :
ASIC (ASICON), 2015 IEEE 11th International Conference on
Print_ISBN :
978-1-4799-8483-1
Electronic_ISBN :
2162-755X
Type :
conf
DOI :
10.1109/ASICON.2015.7517060
Filename :
7517060
Link To Document :
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