Reusable IO technique for improved utility of IC test circuit area

A reusable input/output (IO) techniques presented to enable multiple modules in an integrated circuit (IC) to share IOs, effectively improving area utility. Different schemes are developed based on static and dynamic logic, and key performance parameters including delay, maximum operating frequency, power, PDP, and layout area are investigated. A test circuit consisting of four modules is fabricated in a 0.35μm Global Foundries technology. With the proposed reusable IO technique, the IO number and layout area is reduced, respectively, by 56.5% and 55.3%. The effect of the number of modules on area efficient layout with the proposed technique is also discussed.