Functional decomposition based on information relationship measures extremely effective for symmetric functions

In this paper, an original technology driven logic synthesis approach for look up table FPGAs and complex CMOS gates is presented. General functional decomposition, bottom-up construction and usage of the information relationships and measures are the key concepts of this approach. With this approach the technology mapping is trivial. The experimental results of the prototype tool that implements the approach are optimal for symmetric and are very promising for asymmetric functions.