Title :
Optimum control design of PWM-buck topologies to minimize output impedance
Author :
Soto, A. ; Alou, P. ; Oliver, J.A. ; Cobos, J.A. ; Uceda, J.
Author_Institution :
Div. de Ingenieria Electronica, Univ. Politecnica de Madrid, Spain
Abstract :
The time domain control theory and the root-locus analysis are applied to the design of the PWM buck controller. A method that focuses on the optimization of the close-loop output impedance when a step load occurs is proposed. It accounts for duty cycle saturation. The best transient response achievable by a power stage is obtained. Analytical results are in good agreement with actual measurements
Keywords :
DC-DC power convertors; PWM power convertors; closed loop systems; control system synthesis; electric impedance; optimal control; root loci; time-domain analysis; transient response; PWM-buck topologies; close-loop output impedance optimisation; duty cycle saturation; optimum control design; power stage; root-locus analysis; step load; time domain control theory; transient response; Control design; Control theory; Frequency domain analysis; Impedance; Optimization methods; Pulse width modulation; Pulse width modulation converters; Switching frequency; Time domain analysis; Topology;
Conference_Titel :
Applied Power Electronics Conference and Exposition, 2002. APEC 2002. Seventeenth Annual IEEE
Conference_Location :
Dallas, TX
Print_ISBN :
0-7803-7404-5
DOI :
10.1109/APEC.2002.989280
