Functional testing of EPROMs

The aim of this paper is to develop a testing scheme for EPROM memories. The starting point is the assumed general model of EPROM memory logic structure. For this model, an adequate fault model is developed. The class of faults taken into consideration includes faults in input-output buffers, faults in address decoding circuitry, and faults in memory cell arrays. The proposed testing scheme makes possible the detection of all faults included in the assumed fault model. This scheme takes into account technological and economic aspects. The method proposed is illustrated by detailed solutions for the 2716 EPROM memory.