• DocumentCode
    378550
  • Title

    Dynamic speculative precomputation

  • Author

    Collins, Jamison D. ; Tullsen, Dean M. ; Wang, Hong ; Shen, John P.

  • Author_Institution
    Dept. of Comput. Sci. & Eng., California Univ., San Diego, La Jolla, CA, USA
  • fYear
    2001
  • fDate
    1-5 Dec. 2001
  • Firstpage
    306
  • Lastpage
    317
  • Abstract
    A large number of memory accesses in memory-bound applications are irregular, such as pointer dereferences, and can be effectively targeted by thread-based prefetching techniques like Speculative Precomputation. These techniques execute instructions, for example on an available SMT thread context, that have been extracted directly from the program they are trying to accelerate. Proposed techniques typically require manual user intervention to extract and optimize instruction sequences. This paper proposes Dynamic Speculative Precomputation, which performs all necessary instruction analysis, extraction, and optimization through the use of back-end instruction analysis hardware, located off the processor´s critical path. For a set of memory limited benchmarks an average speedup of 14% is achieved when constructing simple p-slices, and this gain grows to 33% when making use of aggressive optimizations.
  • Keywords
    instruction sets; multi-threading; storage management; SMT thread context; backend instruction analysis; dynamic speculative precomputation; instruction sequences; memory accesses; memory limited benchmarks; p-slices; pointer dereferences; thread-based prefetching; Acceleration; Application software; Computer science; Delay; Hardware; Manuals; Microprocessors; Prefetching; Surface-mount technology; Yarn;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Microarchitecture, 2001. MICRO-34. Proceedings. 34th ACM/IEEE International Symposium on
  • ISSN
    1072-4451
  • Print_ISBN
    0-7965-1369-7
  • Type

    conf

  • DOI
    10.1109/MICRO.2001.991128
  • Filename
    991128