• DocumentCode
    3786722
  • Title

    High-Speed Clock Network Design

  • Author

    P.B. Wu

  • Author_Institution
    Philips Semiconductors
  • Volume
    20
  • Issue
    5
  • fYear
    2004
  • Firstpage
    36
  • Lastpage
    36
  • Keywords
    "Clocks","Energy consumption","Phase locked loops","Integrated circuit interconnections","Design automation","Timing","Delay","Semiconductor device noise","Packaging","Very large scale integration"
  • Journal_Title
    IEEE Circuits and Devices Magazine
  • Publisher
    ieee
  • ISSN
    8755-3996
  • Type

    jour

  • DOI
    10.1109/MCD.2004.1343250
  • Filename
    1343250
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=3786722