Title :
A 1.8 V 1 Gb NAND flash memory with 0.12 /spl mu/m STI process technology
Author :
Lee, J. ; Heung-Soo Im ; Dae-Seok Byeon ; Kyeong-Han Lee ; Dong-Hyuk Chae ; Kyong-Hwa Lee ; Young-Ho Lim ; Jung-Dal Choi ; Young-Il Seo ; Jong-Sik Lee ; Kang-Deog Suh
Author_Institution :
Samsung Electron., Kyunggi, South Korea
Abstract :
A 1.8 V 1 Gb flash memory uses a 0.12 /spl mu/m STI process technology. A charge pump operates at <1.8 V. A center-placed row decoder is digitized in one block pitch by applying a 32-cell NAND structure. A page buffer, containing two latches, supports a cache-program to improve program speed to 7 MB/s.
Keywords :
NAND circuits; cache storage; flash memories; flip-flops; integrated memory circuits; isolation technology; 0.12 micron; 1 Gbit; 1.8 V; 7 MB/s; NAND flash memory; NAND structure; STI process technology; block pitch; cache-program; charge pump; digitized center-placed row decoder; latches; page buffer; program speed; Charge pumps; Decoding; Digital audio players; Digital cameras; Diodes; Flash memory; Latches; Parasitic capacitance; Power supplies; Voltage;
Conference_Titel :
Solid-State Circuits Conference, 2002. Digest of Technical Papers. ISSCC. 2002 IEEE International
Conference_Location :
San Francisco, CA, USA
Print_ISBN :
0-7803-7335-9
DOI :
10.1109/ISSCC.2002.992960
