DocumentCode
378830
Title
A 90Gb/s 2:1 multiplexer IC in InP-based HEMT technology
Author
Suzuki, T. ; Nakasha, Y. ; Takahashi, T. ; Makiyama, K. ; Imanishi, K. ; Hirose, T. ; Watanabe, Y.
Author_Institution
Fujitsu Labs. Ltd., Atsugi, Japan
Volume
1
fYear
2002
fDate
7-7 Feb. 2002
Firstpage
192
Abstract
A 90Gb/s 2:1 multiplexer IC uses 0.13/spl mu/m-gate InP-based HEMT technology. Parallel 2-ch input data are serialized. The differential outputs are 0.7V/sub pp/. The 1.9/spl times/1.8mm/sup 2/ die consumes 1.3W from a -5.2V supply.
Keywords
HEMT integrated circuits; III-V semiconductors; indium compounds; multiplexing equipment; -5.2 V; 0.13 micron; 1.3 W; 90 Gbit/s; InP; InP HEMT technology; multiplexer IC; Bit rate; Clocks; Degradation; Distortion; HEMTs; Impedance; Integrated circuit interconnections; Reflection; Signal design; Time division multiplexing;
fLanguage
English
Publisher
ieee
Conference_Titel
Solid-State Circuits Conference, 2002. Digest of Technical Papers. ISSCC. 2002 IEEE International
Conference_Location
San Francisco, CA, USA
Print_ISBN
0-7803-7335-9
Type
conf
DOI
10.1109/ISSCC.2002.993001
Filename
993001
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