DocumentCode :
378840
Title :
A 3.3 mW /spl Sigma//spl Delta/ modulator for UMTS in 0.18 /spl mu/m CMOS with 70 dB dynamic range in 2 MHz bandwidth
Author :
van Veldhoven, R. ; Philips, K. ; Minnis, B.
Author_Institution :
Philips Res. Lab., Eindhoven, Netherlands
Volume :
1
fYear :
2002
fDate :
7-7 Feb. 2002
Firstpage :
222
Abstract :
The authors present a 4th-order continuous-time ΣΔ modulator with 1.5 b quantizer and feedback DAC for a UMTS receiver. The modulator has 70 dB DNR in a 2 MHz band and -74 dB THD at full scale. An IC which includes two modulators, a PLL, and an oscillator dissipates 11.5 mW at 1.8 V. Active area is 0.41 mm/sup 2/ in a 0.18 μm, 1-poly 5-metal-layer CMOS technology.
Keywords :
CMOS integrated circuits; cellular radio; modulators; radio receivers; sigma-delta modulation; /spl Sigma//spl Delta/ modulator; 0.18 micron; 1-poly 5-metal-layer CMOS technology; 1.8 V; 153.6 MHz; 2 MHz; 3.3 mW; 68 dB; CMOS IC; RF front end; UMTS receiver; continuous-time modulator; feedback DAC; fourth-order sigma-delta modulator; quantizer; zero-IF receiver; 3G mobile communication; Delta modulation; Dynamic range; Solid state circuits; Testing;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Solid-State Circuits Conference, 2002. Digest of Technical Papers. ISSCC. 2002 IEEE International
Conference_Location :
San Francisco, CA, USA
Print_ISBN :
0-7803-7335-9
Type :
conf
DOI :
10.1109/ISSCC.2002.993016
Filename :
993016
Link To Document :
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