• DocumentCode
    3789703
  • Title

    Comments on "Sources of failures and yield improvement for VLSI and restructurable interconnects for RVLSI and WSI: Part I—Sources of failures and yield improvement for VLSI"

  • Author

    J.C. Harden;T.E. Mangir

  • Author_Institution
    Mississippi State University, Mississippi, MS, USA
  • Volume
    74
  • Issue
    3
  • fYear
    1986
  • Firstpage
    515
  • Lastpage
    516
  • Keywords
    "Very large scale integration","Yield estimation","Statistics","Equations","Predictive models","Probability","Redundancy"
  • Journal_Title
    Proceedings of the IEEE
  • Publisher
    ieee
  • ISSN
    0018-9219
  • Type

    jour

  • DOI
    10.1109/PROC.1986.13492
  • Filename
    1457760
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=3789703