DocumentCode :
3790493
Title :
Corrections to “A Universal Architecture for Designing Efficient Modulo
$2^n+1$
Multipliers”
Author :
L. Sousa;R. Chaves
Volume :
52
Issue :
9
fYear :
2005
Firstpage :
1982
Lastpage :
1982
Keywords :
"Polynomials","Computer architecture","Computer science","Military computing","Computer errors","Biographies","Research and development","Multidimensional systems","Genetics","Signal processing algorithms"
Journal_Title :
IEEE Transactions on Circuits and Systems I: Regular Papers
Publisher :
ieee
ISSN :
1549-8328
Type :
jour
DOI :
10.1109/TCSI.2005.856130
Filename :
1506997
Link To Document :
https://search.ricest.ac.ir/dl/search/defaultta.aspx?DTC=49&DC=3790493